DISCRETE-EVENT SIMULATION FOR SEMICONDUCTOR WAFER FABRICATION FACILITIES: A TUTORIAL

Authors

  • John W. Fowler Arizona State University
  • Lars Mönch University of Hagen
  • Thomas Ponsignon Infineon Technologies AG

DOI:

https://doi.org/10.23055/ijietap.2015.22.5.2276

Keywords:

Discrete-event Simulation, Semiconductor Manufacturing, Modeling Issues, Tutorial

Abstract

Discrete-event simulation is a well-established and rather successful method in some semiconductor companies. while other companies do not use simulation at all. Simulation is used for performance assessment and decision-making. This paper focuses on the methodological and practical issues that have to be addressed to build, use, and maintain simulation models for a semiconductor wafer fabrication facility (wafer fab). We describe and discuss the main steps of a simulation study in this domain. We seek to highlight the main issues and present alternative ways to address them. Common pitfalls in using discrete-event simulation in semiconductor manufacturing and how they can be avoided are also discussed.

Author Biographies

John W. Fowler, Arizona State University

Department of Supply Chain Management, Professor

Lars Mönch, University of Hagen

Mathematics and Computer Science, Professor

Thomas Ponsignon, Infineon Technologies AG

Supply Chain Management, PhD

Published

2015-10-26

How to Cite

Fowler, J. W., Mönch, L., & Ponsignon, T. (2015). DISCRETE-EVENT SIMULATION FOR SEMICONDUCTOR WAFER FABRICATION FACILITIES: A TUTORIAL. International Journal of Industrial Engineering: Theory, Applications and Practice, 22(5). https://doi.org/10.23055/ijietap.2015.22.5.2276

Issue

Section

Special Issue: International Symposium on Semiconductor Manufacturing Intelligence 2014 (ISMI2014)